Scientist 'D'
A R&D professional with over 11 years of experience across premier Government institutions including SETS, ITI Ltd. And C-DAC.
At SETS (2020–2026), he played a key role in establishing a hardware testing facility and contributed to the design and development of a Side-Channel Attack (SCA)-resistant cryptographic module for Hardware Security Modules (HSMs).
Previously, at VVDN Technologies (2019–2020), he worked on the implementation of LDPC and Polar encoding/decoding modules for 5G NR, focusing on both uplink and downlink physical layers.
During tenure at R&D at ITI Ltd., Bengaluru (2015–2019), led the design and implementation of IP-based cryptographic products, including FPGA-based realization of proprietary cryptographic algorithms with multi-layer encryption for defence applications using Xilinx and Intel FPGA platforms.
Earlier, at C-DAC Thiruvananthapuram (2013–2014), he contributed to the development of smart card solutions through the implementation of an FPGA-based 8051 microcontroller using VHDL.
He holds an MTech in VLSI & Embedded Systems from CUSAT (2013), an MBA in Marketing from Pondicherry University (2021), and a BTech in Electronics and Communication from the University of Calicut (2011).
Key areas of interest include hardware and communication security analysis, security evaluation of COTS devices, drone security, and RTL design and implementation of cryptographic algorithms.
