Society for Electronic Transactions and Security(SETS)

(Under O/o The Principal Scientific Adviser to the Govt. of India )

MGR Knowledge City, CIT Campus, Taramani, Chennai - 600113

Hardware Security

Our aim is to carry out research in Hardware Security including evaluation of crypto implementation through side channel analysis, Security analysis of Hardware solutions and secure implementation of crypto algorithms in Hardware.
The team has developed Symmetric key and asymmetric key crypto algorithms in hardware, have established facility for side channel analysis (SCA) and security testing of hardware equipment.

The recent developments include leveraging AI based approaches for SCA and usage of high-performance computing for analysis purposes. The team is engaged in evolving in testing techniques, procedures for the evolving post-quantum crypto systems.

Current Activities

infrastructure

Government of India funded projects

S. No Area/Project Title Collaborating Agency
1. AI for Cybersecurity (AICS)
  • Indian Institute of Technology – Madras, (IIT-M), Indian Institute of Technology – Delhi (IIT-D), Indian Institute of Technology – Jodhpur (IIT-J), Centre for Development of Advanced Computing (C-DAC), Bengaluru
2. Development of Secure Post Quantum Public Key Infrastructure
  • Centre for Development of Advanced Computing (CDAC), Bangalore & Noida
  • Indian Institute of Technology – Madras, (IIT-M)
  • Indian Institute Of Information Technology, Design & Manufacturing, Kurnool (IIITDM – Kurnool)

Team Members

Smt. A. Suganya

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Shri. R. Hari Prasad

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Smt. N. Eswari Devi

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Ms K Preethi

Shri. J. Renita

Smt. S. Hema Priya

Shri. E. Velmurugan E

Smt. T. Eswari

Smt. K. Aarthi

Shri. Pavan Rakesh Tripathi

Shri. G. Mugilan