Sr. Scientist
Smt Suganya Annadurai is working as Senior Scientist at SETS and obtained her MTech in VLSI Design from SASTRA University, Thanjavur. In her 20 years of experience at SETS she has developed core competency in secure and efficient realisation of cryptography modules. Her research interests include side channel analysis attacks and countermeasures, analysis and design of efficient and secure crypto modules for communication systems, ubiquitous devices, and embedded devices. She played a major role in the establishment of Side channel analysis evaluation laboratory and hardware testing facility at SETS for the evaluation of cryptography hardware. She has good number of publications in reputed international conferences to her credit.
