Dr. Renita is a Scientist at the Hardware Security Research Group (HSRG), SETS. Her research focuses on secure cryptographic hardware, including RTL design, implementation security testing of classical and post-quantum cryptographic (PQC) algorithms using Side-Channel Analysis (SCA), Fault Analysis (FA), ISO/IEC standards-based hardware security evaluation, and Cryptographic Algorithm Validation Program (CAVP) conformance testing. She is currently interested in developing ISO/IEC-compliant frameworks for the security evaluation and validation of cryptographic hardware implementations.
